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It should be made clear the only IA-32 processor which supported Physical Address Extension as defined by Intel was Xeon. PAE requires BOTH 36 address registers AND 36bit data bus for RAM.
All IA-32 processors had at most a 32bit data bus. 36 address registers only allows paging - it is not PAE support.
Only Xeon had 36bits for RAM. Xeon supported 8GB RAM total. The 8GB was split into 2x 4GB memory banks accessed one bank at a time. The 32bit + 4bit bus allowed a segment selector. (Xeon was technically a 36bit CPU).
Onzite. ( talk) 23:25, 10 May 2020 (UTC)
The section says 2.3.23 but under the old scheme odd numbers were development kernels (2.2 series was the release, 2.3 was concurrent and the development space for what would ship as 2.4). Would probably make sense to also mention which kernel was the first to ship with PAE, since no released distro would use a development kernel. -- 97.115.191.42 ( talk) 03:44, 1 May 2022 (UTC)